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Hi, my name is Riadh Said, an Engineer at Agilent Technologies. Today what I would like
to do is demonstrate our new digital signal interface module connectivity to the Agilent
X-Series signal generators. This module allows you to stream digital IQ to and from your
baseband chipset. We designed this module to enable baseband engineers to verify their
ASICs or FPGAs before the RF chain is complete, allowing you to accelerate your baseband verification.
Let's go ahead and look at our demo setup. We have the MXG streaming over our digital
bus to the digital signal interface module, over the LVDS ribbon into our device under
test. Connected to our device is the logic analyzer. We are going to be doing some post-processing
analysis. That is for the digital output mode. On the digital input modes, what we are going
to be doing is sourcing the data from our DUT over the LVDS link, into the DSIM and
back into the MXG for our up conversion. From there we are going to analyze the signal at
the RF using our PXA signal analyzer. Here is a block diagram of your device. In this
case, we are going to substitute the receiver chain with the MXG and the digital signal
interface module to stream the digital IQ directly into your FPGA. Inside your FPGA
you can perform BER analysis, or you can actually look at the decoded bits through your logic
analyzer. Let's configure this setup. So the first thing we want to do is configure our
arbitrary waveform generator to transmit an LTE signal. So turn on the arb. Next we want
to go to the AUX function and turn on the digital interface. Before we do that, we have
to setup the logic type, LVDS. Next we want to do the port configuration. In this case,
we are going to do parallel IQ. Next we want to configure our data setup. In this case,
we are going to do 16 bit words, and then we are going to do the two's compliment format,
and we are going to have the bit order be LSB. The final step is to configure our clock.
In this case, we are going to set our clock rate to 200 MHz, and we are going to be sourcing
the clock from the source into the device under test. Once we do that, we can turn on
our digital interface module. Now what we are doing is we are taking digital IQ from
the MXG, streaming it over our digital bus into the digital signal interface module,
into our device under test. Next we want to look at our logic analyzer and actually visualize
what we are transmitting to the DUT. So you can see on the logic analyzer here, we have
the binary IQ channels and our clock coming into the logic analyzer running at the full
200 MHz per second. Now let's look at the input mode. Here is a block diagram of your
device. In this case, we are going to substitute the transmitter of your device with the MXG
and the digital signal interface module. This will allow us to verify the RF performance
of your digital baseband and make sure it's not creating any spectral splatter or ACPR.
Let's go ahead and configure the setup. Since we already set up our digital output mode,
setting up digital input should be a lot simpler. In this case, all you have to do is go to
the data setup and change your direction. In this case, we are going from output to
input. Once you have configured that, now we are streaming from the device under test
to the digital signal interface module over the digital bus into the MXG. The MXG is then
up-converting it. In this case, we set it to 2 GHz, and we are going into our spectrum
analyzer and doing an ACPR measurement. So you just saw a demonstration of our digital
output mode and digital input mode. In the digital output mode, you can take advantage
of our full signal studio applications suite for realistic digital IQ stimulus. In the
digital input mode, you can take advantage of our fully calibrated RF chain to do RF
verification of your chipset. Both modes offer flexible interfacing to tailor to your specific
ASIC. If you would like to learn more about the X-Series signal generators, please visit
the URL on your screen. Thank you for watching.