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[MUSIC]
Now, when
we talk about processes for planar high K. There were 2 types of processes.
You know I, I showed there was I actually didn't show but there
was one group of companies, Benton did what was called the gate first.
And in principle, that looks very simple because you put
all the LEDs I talked about, then you etch it.
The problem is that you, they have to then go through
a lot of annealing steps, and it sees a lot of ambient.
And there's high K in metal really, really, very sensitive.
Moment you go off certain temperatures you get defects, they'll start leaking.
They'll be charged, they'll be shifting.
So even though it looked simple in, in, in practice and integration, it was
a real bear because of all the
material transformations, that took place at high temperature.
Intel, on the other hand, went into what they call the gate last.
Where basically, they create a dummy.
They, doing the backend, they then removed
the poly silicon and then refilled it back.
With this structure, so you created, you refilled the
[INAUDIBLE]
you put the work function metal, and then you fill with the gate fill.
This gate fill provides the conductivity, this provides the work function.
And the, the temperatures, could be then adjusted.
You don't need to see very high temperatures.
As would you have, in this case where you actually have the
[INAUDIBLE]
are already done for that.
So, the, it's a much more complex process, than you can see it requires.
You know, because of the scaling,
and aspect ratios, better deposition capabilities.
Now, when you go to FinFET, you have the same things happening.
You still, you know, in the FinFET, they're still using the gate
last process, now you've, you've sort of taken the transistor, and put
it on it's, turned it 90 degrees. And if you look, you now have to still
go through a process of getting a dummy gate, removing it, and putting it back.
But now, when you open up that trench over that fin, think about it, it's going to be
a pretty nasty, you know, set of grooves that you've got to, to fill in.
And then on top it it, you have
the straining material that is put, that's a silk and
[UNKNOWN]
, which you probably have gotten.
At about, and then you have to put in the contacts.
So here's a cross section, in this direction.
This is the, the bin.
This is the high K metal gate stack, you can
see the high K and that's probably a work function.
This is mainly the, the contacting material which is for conductivity.
And if you take it in this direction, you can see the contacts.
This is the gate, but wrapping around so this is the fin.
One, one thing is with this
[INAUDIBLE]
, you get to You, you've learned how to look at something,
and say, you know, I mean can I actually visually picture everything.
Because it's always very difficult, when you look at these,
and say, how do I actually, figure out what is what?
So this is the gate, right, which is wrapping around.
The fin was like this, so you're looking at it in cross section.
These are the source drains and these are the contacts.
And then, if you wanted to introduce new materials,
you know, you would actually create the fins, and you
would remove some of the silicon, and replace them with
whatever advanced shell material, and then carry on the process.
So finally, you know, we talked, you know, I want to talk about the
parasitic, and the resistances, because, you know,
I showed some of the contacts, right.
And, a lot of work is going out to make, this transistor as.
Yeah, but it's higher current so if you
think about it as a variable transistor, resistor you,
you trying to keep this resistance to be
as small as possible by changing the gate length
changing making sure you have a load pressure voltage etc, etc,
and then at the same time being able to turn it off.
But if you have a layout, when you do a layout.
If you have resistances in CDs which are there.
You have the resistance of the diffuser, you have the resistance of the contact,
then whatever, you know, remember these all,
you're, you're effectively looking at all these
resistances and CDs between the source and
the drain, if these start becoming very high.
Then you're going to give up all the,
the speed that you've achieved by designing this transistor.
So it's a really important, to reduce the contact
resistance, and also to reduce the R of diffusion.
So 1, way obviously to reduce the R diffusion
is to re, is to reduce this distance between the
contact and the gate.
And usually in the past, we would keep this distance because of alignment issues.
You didn't want the contact to hi the gate, and short it out.
Right?
So this was also part of the scaling. I mean this also added extra area.
So even if you reduce the gate, sometimes this overlap, or
this extent of this diffusion would decide the size of the transisteor.
And would reduce your ability, to shrink things.
So,
this is where some of the process
integration, and using new materials comes in.
What you can do is you, you put in the A etch
top layer, in such a way that, when you do the etching.
You can stop at the edge, and you have
enough selectivity, that you can continue to edge down.
And so, when, when you come back and fill it, you're still contacting the
source drain, you've reduced this L diffusion
quite a bit, but you're not shorting the,
the gate. So you've, you've, you've improved.
then on top of it, as I was pointing, the resistance
of the it's contact is a function of its contact size right.
And you're also shaping the contact area, if
you keep staying with square volts, and you know
these have to be reduced on top of it, if they are going to overlap right, and
part of that contact is going to get blocked by the gate then
the area decreases even further, so you're going to get incredibly high resistances.
So then you go to rectangular contacts, and, then you know you have,
you've at least taken place, taken care that you not reduced the area so much.
So you in, in some of the fins, and it's, it turns out works out quite well.
That when you have the
fins, and you start putting all these stressors, they actually combine together,
so you get this 1, all the source drains are connected together.
So you can put this one big long narrow contact,
I mean this long contact, and that gives you area.
And so that, that then allows you then
to at least keep the contact resistant under control.
>> The problem is that, even with that,
like as you shrink, even though you've now tried
to keep the area large enough, still, you know,
sometimes the, the doping levels are such, and especially,
if you start going to some of the more esoteric,
[UNKNOWN]
is not even the silicon, germanium.
You can't dope things well, because in the past.
What would happen is that you would reduce, a contact
resistance by doping, and effectively you, you know, if you had
an end contact you'd, you'd dope, you'd, it's such a
narrowing of the barrier that you could actually do electron tunneling.
But now as you go to either materials
that you can dope, or in some of this low dope material you you have, Okay.
So, if you can't dope it, then, then
you're back to the situation where you say, Okay.
If can't tunnel through it, then I have to jump over that barrier.
So, I need to keep that barrier small.
But then you've got to find, contacting materials that
have the right work function, that they are close
to the bandages.
So you're back, again, like you had with the gate material.
For the contact material, you've got to
find contacts, that are close to the bandages.
And then if they are very close, then you can basically get low contact resistance.
The problem, again, is that you take something like
>> Germaniums and some of the compound semiconductors, they have what
they call Fermi level pinning, that there's enough band bending taking
place and, that, you, no matter what, even though you
got the right, what you think is the right function.
Because of the pinning, we, you have band bending,
and you still maintain this very high barrier height.
The barrier height doesn't seem to change, even
though you changed the whole function of the metal,
because, basically, the material is is Germaniums, and there
are states at the interface that are pinning it.
So, and usually,
those are associated with the metal.
So what happens, and I think this is part
of the work that was done here at Stamford.
But you start putting in,
of all things, insulators.
You deepen, but if you make the, thin enough you can tunnel through them.
But they also then prevent, because of Fermi pinning they.
You, you, you, don't get that effectively high
value, and you could then down right through it.
So, let me just go through some of the things.
So, you document materials, obviously one of the biggest acts is about deposition.
Here is something that I'll just go right through that.
But, you know, LD is one of those where, you use a precursor.
You basically use the fact, that if you just put in
some some of these precursor materials, they'll form a mono layer.
Then you react them with some oxygen, and you'll
be left with one mono layer of an oxide. So you have this ability
to control, very reproducibly the thickness of the film.
And, the advantage of ALD, especially with all of
the processes that you have seen, is you get
very good thickness control of course, a good step
coverage and it's at low temperatures, which is great.
The problem is that you're really limited, you can't
do pure metals, you can do oxides and nitrites.
You can do some mixed oxides are difficult.
Deposition rate is low.
And it's
very hard to do.
So the only the other way deposition is, by physical vapor
deposition, where basically you have a target you set up a plasma.
And, at the targeted cell, because of the bombardment of high energy
sputtering atoms, you start knocking out some of the material from the target.
So you've got this flux of atomic elements coming in, and they land, and they
form this film.
So, the advantages are, that you can use a wide
variety of metals, it's easy to vary the composition, but
you typically have poor step coverage, because of the directionality
of the material, and the pressures under which you operate at.
And the thickness control could, or could not be an issue depending on the material.
Now, co, companies like applied materials
they make, and a lot of these others, they make these huge you know,
they'll make these systems, like, if you, if you want to build this factory.
You've got to have this deposition equipment, that can
handle very large vapors, they have to have very large
[UNKNOWN]
parts, and they've got to do it incredibly clean ambiance.
So, they're expensive, and they're, you know, if
you try to do learning, we've talked about
all these different materials, that you've got to
look through, and if you had to use.
Some of the, the equipment that is built for manufacturing, first of all it's,
the throughput is very low, it's very expensive, because if you have a deposit
first of all if it's a sputtering machine you've got to buy the
targets you've got to, you know, you can only do one experiment per wafer.
So, the learning cycles, are very short.
So the company I work in market, we
build, this equipment which is not meant for production.
But meant, actually, for experiments.
To run the experiments.
And run them, so you can run multiple experiments.
And these, you know, these consist of, like, what we call HPC is
the height through put, for, process combinatorially.
Can do combinatorial.
Where, whereby we, we can actually deposit only on a small spot, and
so we can look at multiple combinations on a single wafer, and get results.
And you can do them, you know, in relatively real time.
So, you, you do a lot of experiments in parallel, on the same wafer.
The,
the high speed, and site isolated, you come back
and do a characterization, so part of the methodology is
to build up structures, that are relatively simple, can
be analyzed fast, and gives you the answers right away.
So, we, we have both what we call a wet processor, you can actually see this.
These are.
You know 32 different nozzles and we can do
wet processing separately one each, one of those sites.
So if you have to treat the surface, we can do several different treatments.
And then you go into the PVD, and ALD chambers where with the
PVD you have an apperature, and you have multiple guns, you can actually deposit.
Region, and this is like a 300 meter wafer, you can deposit
like spots, individual spots, and each of them can be very different.
They can have a different composition, different structure et,cetera.
And, then on the LD, you know, unfortunately you can't do this
sort of level of, but we can, but we do a 4.
Quadrants by putting curtains in between them so
you can deposit 4 different LD films at
the same time.
So then you can combine them, and
especially like say something like a high k
metal gate, where you're trying to look at
multiple combinations, of high k, and gate stacks.
You can now take what we call a coupon, which is a small portion, and we can run
multiple different metals, and we can do multiple different
[UNKNOWN],
and we can do combinations, and look at the results, and find out...
In a few days we can run through an
entire set of experiments, that if you tried to do
in a high throughput machine, would cost you a lot
of money, plus probably have the production people very upset.
Because you're using up equipment for a couple of wafers,
[INAUDIBLE]
, plus, you know, you can actually look at different materials,
which you probably wouldn't be allowed to do in the lab.
So, finally wanted to talk about, you know, we said that, you know, you
can reuse, I showed the case where you using a high K metal gate.
Both for contacts as well as for high k.
Well guess what?
We are using them DRAM capacitors, and even for ReRAM
in memories.
And you know memories is, in spite of, is,
is a large part of the semi conductor market.
there are different types of memories depending on,
you know what if you look at a system
there's an overall hierarchy in terms of what is
the access time and what is the storage limits.
I'm going to take the case of the
flash, which is usually typically outside where you
try to store a large number of, large amount of data.
And we're not talking about the on chip.
These are typically SRAM, which would be done with the
typical high k metal gate process used for the logic.
let me just skip through that.
So, and I want to talk about one of the,
the promising devices for for nonvolatile memory, which is ReRAM.
And, and professor Nishi, and
professor
[UNKNOWN]
, they run this program in, in Stanford called
NMTRI, where the ReRAM is a big part of that.
It's, the ReRAM is basically a two terminal device.
it has to have a minimum two resistance states.
A high resistance, and a low resistance state.
And the operations that consist is forming Which is like a high
voltage steps to, you could say, create the, the electrical state which allows
you to go back, and forth.
There's a reset which allows you to go
from low resistance to high resistance, and a set
from high resistance to low resistance, and then there's
a read to tell which state it is in.
And then these are some of the electrical parameters of interest
[UNKNOWN]
would like them as low as possible.
You want i on and i off to be as low as
possible, and you want, I'm sorry, you want i on, and i
off ratio to be as high as possible, and the switching currents
to be as low as possible from a power point of view.
See, if you look at the mechanism.
What happened is basically we start with a methyl oxide.
We put them between 2 electrodes.
We apply, electric field we study the old, the break down consists
of creating these oxide, oxygen into shield
[INAUDIBLE],
like I just talked about.
And because of these electric fields and the temperature.
Some of the oxygen typically will wind up, say being stored in an electrode.
And then, you get what you call a fillament of vacancies,
and as a result of the fillament, you get a conductive back.
So the electrons tunnel from one vacancy to the other.
And then to reset.
You apply a voltage, and then you push the oxygen
[INAUDIBLE].
They recombine, and as a result what happens, is you've got an area which
is free of defects, you've recombined the defects, so the, the resistance goes up.
And then to set it again, you apply high
voltage, and then it's almost like the break down process.
That took place is the first state, so the forming, and
the set, are very similar, and these are shown, you know.
Here's the set process, this is the reset process,
and you can say, okay, this looks
relatively simple, 3 you know, 3 electrodes,
I mean 2 electrodes and a, and a metal, a metal insulated metal well.
If you look at all the things, all that you have to look at, you
have to look the bottom metal, you have to look at the surface prep, you have
to look at the main body of the dialectiric, the top metal, and you start
looking at all the different combinations, you can
end up with a huge number of combinations.
We, over the last four years, have been looking at, we've ran to 75,000.
And we sell a few of them.
Process integration, that's, so it's there's still optimizing
and we've understood a lot of what is going on so to the extent that you know
here is a segmentation that shows you know, again, at the end of
the day after you've done all of your research and you've done everything
that you wanted. It's back to again specs, right?
You have to meet specs, and the specs
on some of the materials, are extremely complex, right.
So, you want to have for example on the flash side, you
want not only access time, but you want very, very low power.
You want very low switching currents. You want good data retention.
So when we go back, and say Okay,
now we've understood it, now we got it to work, we
have some idea, and it's now, Okay, how much of the material
side, and the defect side, do I need to know in order
to be able to meet the specs that are now being given.
And then, this is where some of the fundamental understanding comes into play.
For example, this is showing the simulation
of what happens after the form all
thes vacancies, the experiment and this is like a conductinh part but the are
close because they are metalic, control the
currents during the forming process But, if you
control the currents during the forming process, you
change the size and therefore the effective resistance.
And, you know, this is typically what you want, about 30 microamps
is what, you know, you have from a spec point of view.
The problem is that if you have a few vacancies,
as talk, we talked about recombination, is there a possibility that
just under, if you leave things heated and
there are vacancy interstitial lying around, will they recombine?
And will you then have a problem maintaining your state.
So those are some of the work which is going, ongoing.
But it just shoes that the level of detail, in terms of atomic level that
you have to understand on there. So,
here's, just again, like the picture was saying.
We talked, about the combinatorial.
These are what we looked at, it, in the molecule in the last few years.
Almost as many as there are in the
[UNKNOWN]
So here's the summary.
So the past introduction of new materials, was slow
due to complexity of processing, and slow learning process.
You know, people are really scared, about bringing a new material in.
As I said, all you need to have is a, one defect going from one lattice
side to the other, and all of a sudden all that needs is one transistor fails.
That's transits is one of the billion that happens it,
so happens it's the one that is the most critical.
You know it is a memory bit, and then
the whole chip fail which causes the system to fail.
So I use to always give this thing about, you heard about the butterfly fluttering.
It's wings in the in the northern hemisphere, and then
in the southern hemisphere they have a tornado, or vice versa.
Southern hemisphere, and they have a tornado somewhere else.
It's the same thing with materials, always that something simple, small happens and
[LAUGH]
the, and the consequences are huge.
So that's why people have been really scared.
But that doesn't prevent us from introducing it,
because the future is about materials, and device.
And so the new paradigm is using a lot of these, combinatorial techniques.
Distinct possibilities.
And to back it up, with the right characterization, and knowledge.
And this is where, I think
the Universities together working with the things.
And all of you, I would say, you know, learn fundamentals well.
If you learn the fundamentals, I think you
can solve any problem that you're going to get.
So, I always tell the engineers who work for me, the
textbook, some of the, especially some of the, the main textbooks.
There, there always, the knowledge there is always, is always correct.
not correct, but is always valuable. Processes, may come, and go.
And, you know, typically we've seen processes
come, and go but the knowledge stays constant.
Then, that is going to be critical
always.
[MUSIC]