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So once I understood that my device was marginal instability, and itís close, itís unconditionally
stable, but I donít think I could hold that over any sort of manufacturing tolerances,
I wanted to see just based on my bias what would happen.
So itís very easy to select a couple of items to tune or to vary while Iím watching the
simulations. And here we can see weíre just varying those ñ weíre varying those bias
voltages.
And this particular device we are getting closer to the FFT of the device than maybe
most designs, so the device definitely had a sweet spot from around four to eight-tenths
of a volt on the gate, and I found that when I went much above that, I actually lost stability,
my stability went down considerably.
It went up slightly in that 0.4 to 0.8 range than 1.015, but not much. It really sort of
hung right there, leading me to continue to believe Iím right on the edge, and we really
need to focus on stability before we worry about even designing any sort of amplification
stage.
So based on this, I wanted to add some sort of feedback to try to improve the stability
of the device, but before I did that, I wanted to understand what my options were. So I synchronized
the layout of this device from the schematic to the layout and just placed some bulk vias
to ground so I could understand, you know, how am I going to ñ if I wanted to do some
sort of source series feedback, how that would look. Or if I wanted to do some other type
of feedback, what sizes would I have to end up with?
So series resistance in the source is a very classic way of improving our stability. It
looked like, you know, here I could easily move my vias out a little bit, have some air
bridge coming over, mounting a little bit of resistance and then down to ground. So
that was the first idea to look at. And I went ahead and mocked that up.
But I noticed that although it did tune things by adding the additional inductance and adding
the actual via models themselves, it also looked very sensitive. It moved it quite a
bit. And so I started just by trading off or just varying the line width ñ length a
little bit, excuse me. And just varying the line length or actually, moving that via in
and out, pretty dramatically move my stability factor around so that I could see that anything
I was doing in the source was a very sensitive area.
And if you try to go ahead and in any design make it where youíre relying on something
thatís very sensitive, you know youíre going to have manufacturing problems, and youíre
going to have designs that are tightly cued, high tuned, and are easy to move around and
very easy to miss your design.
So I tried to add a little resistance there just to see if it really did what I was expecting
once I saw the initial line length insertion, and it does. As soon as you start to add any
sort of resistance to try to give yourself a little additional stability, it did knock
it down very quickly. So, again, just going from one to five ohms, weíre back on the
edge. So small variations there were looking at not very doable.
So another very traditional way or a classic way to improve our stability is to look at
the gate-to-drain feedback. So let me mock this up. While Iím looking at it on the schematic,
itís very hard to envision how is this going to get mounted? Because Iíve got a device,
Iíve got vias there, Iíve got other things going on. So fortunately, I could easily synchronize
my schematic element to my layout again. And then once Iím in the layout with the additions
to the newer PDKs that TriQuint has made in conjunction with Agilent, itís very easy
to do this routing.
So I quickly routed a line around the upper vias, as you can see here on the left, just
to route my traces. I was able to insert vias automatically and pop up to different levels
and wire my compacitor and my resistor. Once I had that, itís very simple to extract the
parasitic transmission lines and to understand what the transmission line model of this particular
feedback would be.
So I went ahead and modeled the transmission lines, and it gave me an idea of what this
was going to look like from the standpoint of the schematic model. So taking this back
into the schematic using these line lengths approximately. Iím not worried about all
the bends and everything yet. Iím just really worried about what itís going to take to
get me kind of routed around that via and in the right area because we know weíre going
to still be moving things around, doing some tuning and things like that.
So I can just see that with the initial line length that weíre talking about, I helped
my stability, it improved it, you know, 40% or so. And itís something that I can already
see that Iím going to be able to build here. And because of the sensitivity of the source
area, Iíve included the vias and some transmission line to get to those vias.
So I started by looking at something just really basic here. How does this transmission
line feedback and resistance work? I think I skipped a slide. Excuse me. No. So I did
some initial tuning, again, we brought up the tuning environment and moved those transmission
lines and links. And changes or impedances varied the resistance, and it didnít affect
things greatly. It affected it slightly, as you would expect.
So I rigged up a Monte Carlo simulation of that particular area to see what would happen
when Iím varying my process. So Iím varying the process, as well as the match or the stability
structure around it. So Iím letting the microstrip media vary, as well as the devices themselves.
And I let the transmission lines vary considerably at 50% in length. So this really had a pretty
good stable spot from about plus or minus 50%, so 150 to 50 microns on the line length.
And it showed me even though lower down in frequency, Iím getting some instability regions
that I may have to watch out for, some oscillations on the lower side. And certainly, in the band
of interest that Iím working in, itís very stable, and it seemed to be stable over manufacturing
tolerances.
So looking at this, I was fairly satisfied with the stability Iíd locked in. And then
I was more interested in, next, starting to think about the matching. So if Iíve got
a good stable device, my next course was to get a good unconditionally stable match. I
want something that thereís no possibility, given whatever impedances that I present to
this amplifier that I can go into oscillation or get unstable conditions.
Within ADS there are some routines. They call themsmart components. I can actually have
it generate for me an initial matching condition. That is certainly one way to do it, and often
quick matches is very convenient for that. I get some new device, I just want to see
what it might look like, not really intending to get a true physical match with it. So Iíll
often just quickly use those.
But another method is just conjugant matching techniques, which is traditionally how Iíve
done this. And if you havenít done this before, thereís an exceptionally good reference and
many, many books on this topic that this particular reference for the App Note 95-1, itís a very
long traditional App Note thatís been in industry for many years. It was created when
Agilent as part of Hewlett Packard, and itís available at this website. And weíll go how
to do conjugant matching techniques.
So looking at just basic Rollettís stability analysis with conjugant matching techniques
and thinking back that I am trying to minimize the length of any stubs I have coming off
my main line, I opted for impedance matching on the output. It was an area where I could
see that I could ñ instead of putting a stub, I could do an impedance match, so even though
itís a lower impedance transmission line. I opted for that method.
And once I looked at this, I was able to, with a little bit of tuning ñ Iím waiting
for the trace to come to up here. You can see with a little bit of tuning, I was able
to center my gain, as well as my match and get pretty much what I was expecting out of
the device. So without really super tuning the device. Thereís always some danger that
if you get your matching too tuned, very, very narrow banded as you cascade the stages
that effect just gets worse and worse.
And if itís a high-Q device, that you really canít control where youíre getting your
gain out of it. So a reasonable amount of gain coming out of it, nicely matched, and
a fair amount of bandwidth, considering the bandwidth for this particular application,
again, was very narrow.
So then I started cascading these elements together, and my output stage and the stage
before it were giving me the ñ pretty much the output power and the gain I wanted. With
the lower power from the baseband coming in on the left, I wanted just a little bit more
gain out of that device, so I shortened it up. So instead of a 50 micron gate length,
it was 25, which, on its own, pushed stability up. So I chose not to put the feedback on
that particular device there.
But at this point, we stopped, and we tried a couple different configurations to see if
I could get better gain out of that first and second device. And I tried a cascode pair,
and it was close, but I was actually still getting slightly better gain out of the cascaded
approach here than using a cascode. And what Iíve done here is inter-stage; I brought
every stage to 50 ohms. So Iím matching just classically 50 ohms, then putting the stages
together.
Given where these impedances were, when I tried to match directly from the input of
one device to the output ñ from the output of one device and the input of the next, the
structure got longer. And as that did, the losses were actually knocking my gain back
down, so I was not really getting any benefit from doing inter-stage matching between the
two.
Now, if that had been giving me some benefit, and I wasnít coming out to a clean 50 ohm
point or a 50 ohm reference somewhere or some sort of impedance reference, thereís a technique
in ADS using something called test labs. And basically, what I could have done was to cascade
all three of these devices together within the tests labs, and I could have looked at
inter-stage matching while I was doing this. It was something I didnít get a chance to
get done on this, but sometimes when youíre having those inter-stage problems and maybe
youíre doing a three-, four-, five-, six-stage amp, youíre able to look between the devices,
youíre able to look at the overall performance while youíre looking at the interactions
between the individual stages via tests labs.
So thereís an example within the ADS example structure. And if you have some issues with
it, please contact your local Agilent support team, and we can help you out with that. So
kind of tuning this one up, it took a little slight tuning. I was able to get close to
27 dB of gain out of this theoretically here. And I sort of worked a little bit more on
my output match, but again, we had to get this built. And so far, all I had done is
get the design with empirical transmission line models. And again, this was kind of a
short timeframe that we were working with here.
So it looked fairly centered from where I wanted to work from a frequency standpoint.
I was getting the gain out that I wanted. I was a little concerned about what this would
be doing from a nonlinear standpoint, so I did run some compression on the device to
look at, you know, what the linear range was. And then ADS also has